Phase-change memory is a device which uses a phase-change film formed of a chalcogenide material of which electrical resistance is changed according to a crystal state such as an amorphous or crystalline state in a memory cell. Due to a non-volatile property, a fast read/write speed, low power consumption, high reliability and durability, and integration of a device, phase-change memory has been spotlighted. In such phase-change memory, Joule's heat caused by current has been used as a heat source for phase change. FIG. 1 illustrates the structure of a conventional phase-change memory cell array.
As illustrated in FIG. 1, a memory cell has a structure in which one cell transistor CTR of which gate is connected to a word line WL and a phase-change cell PCC and a resistor R between a drain and a bit line BL of the cell transistor CTR are connected in series. When the word line WL and the bit line BL are selected, current is applied to the selected phase-change cell PCC and the crystal state of the PCC is changed.
FIG. 2 illustrates the principle of the phase-change memory. As illustrated in FIG. 2, after a high pulse current of approximately 2 mA is applied to a phase-change film 20 for about 50 ns via a contact 10 from a transistor disposed below the phase-change film 20 and is heated to a melting point Tm, a programming region 30 having a high resistance in a full amorphous state is formed in a portion in which the phase-change film 20 and the contact 10 contact each other using a fast cooling speed when the pulse current is intercepted. This state is referred to as a reset state, and the reset state is defined as a state in which, for example, data ‘1’ is stored.
In this state, a pulse current of approximately 0.1 mA is applied to the phase-change film 20 via the contact 10 from the transistor disposed below the phase-change film 20 and the phase-change film 20 is kept at a crystallization temperature and then, the temperature of the phase-change film 20 is lowered. As such, the programming region 30 in the reset state is recovered to a crystalline state having a low resistance and this state is referred to as a set state, and the set state is defined as a state in which, for example, data ‘0’ is stored. When stored data is read, a lower current than a reset current and a set current is applied to the phase-change film 20 and a change in a resistance is checked.